1. Field of the Invention
The disclosed subject matter relates generally to a package for housing an electronic circuit. More particularly, the disclosed subject matter relates to a surface mount package having a composite metal base supported by a dielectric frame with raised sidewalls and a surface mount package having a dielectric frame and floating metallic components.
2. Description of the Related Art
Increasingly complex microelectronic circuits such as silicon semiconductor integrated circuits and hybrid microelectronic circuits require packages, which both encase the circuits and provide electrical interconnection to external circuitry. One suitable package is a surface mount package (“SMT”). The SMT substrate is formed from a plurality of dielectric layers. Each dielectric layer has certain designated functions. For example, a portion of a first dielectric layer may be metallized to permit soldering of an electronic device. A second layer may have metallized circuit traces for wire bonding. Another dielectric layer may be glass sealed to a lid encasing the chip in a hermetic package. Of course, any or all layers may be for a multiplicity of functions. Metallizations extending from the circuit traces are soldered to contacts on a circuit board electrically interconnecting the package to the board.
A surface mount package is favored where a low profile package is required or the space available to mount the package is limited. As electronic devices become more complex and available space is reduced, the desirability of a surface mount package increases. Concurrently, as the device complexity increases, the heat generated by operation increases. If the heat is not removed, the temperature of the device rises shortening the operational life. It is therefore highly desirable to develop surface mount packages having high thermal conductivity.
Most dielectric surface mount packages have an alumina (Al2O3) base. Alumina is selected because its coefficient of thermal expansion is close to that of silicon integrated circuits and alumina hybrid circuits. Pre-fired alumina (green tape) is easy to stamp or otherwise shape into a desired design. After firing, a dense chemically resistant substrate is formed. Al2O3 is a poor conductor of heat, having a thermal conductivity (Tc) of 20 W/m-K. By comparison, copper has a Tc of 393.7 W/m-K.
To improve the thermal conduction of heat from the integrated circuit device, U.S. Pat. No. 4,827,082 by Horiuchi et al discloses the use of a dielectric base having better thermal conductivity than alumina. Rather than forming the base of the package from Al2O3, AlN or SiC having a thermal conductivity in excess of 140 W/m-K is chosen for the base. The device is mounted directly to the AlN or SiC base and the patentees report an eight-fold improvement in thermal conductivity. Aluminum nitride and silicon carbide are more expensive than alumina and more difficult to shape. Care must be taken during firing to prevent oxidation of aluminum nitride back to Al2O3.
Another solution is disclosed in U.S. Pat. No. 4,025,997 to Gernitis et al. A metallic heat sink is soldered on an alumina substrate opposite the integrated circuit device. To prevent fracture of the substrate due to coefficient of thermal expansion mismatch, the heat sink is selected to be a composite material having high thermal conductivity and a relatively low coefficient of thermal expansion. Disclosed substrates include molybdenum clad copper and copper clad molybdenum. Proper selection of cladding thickness adjusts the coefficient of thermal expansion to a desired quantity. A disadvantage with this approach is that an insulative alumina layer is disposed between the integrated circuit device and the heat sink. The removal of heat from the chip is limited by the conduction of heat through the alumina layer.
An approach disclosed in a Shinko Electric publication entitled “Power Transistor Dielectric Package, LCC-3 Series” has the dielectric base sandwiched between two thin tungsten-copper plates. An integrated circuit device is mounted on an interior plate and tungsten vias interconnect the two plates to conduct heat from the device. Thermal conductivity is limited by the tungsten, Tc=166.1 W/m-K, and the cross-sectional area of the vias. The tungsten vias appear to occupy about 20-25% of the cross-sectional area between the two copper-tungsten plates.
Another approach is disclosed in U.S. Pat. No. 4,680,618 to Kuroda et al. A porous molybdenum or tungsten base is infiltrated with molten copper. The infiltrated base is then soldered to a dielectric frame. An electronic device is bonded directly to the infiltrated molybdenum or tungsten base. A thermal conductivity of up to 293 W/m-K is theoretically possible with this type of package.
An infiltrated base has limitations. All pores in the skeleton must be filled with the molten copper. Any air gaps will reduce thermal conductivity. When the concentration of the tungsten is high, above about 65% by volume (80% by weight), the infiltrated composite becomes difficult to shape by forging or other deformation processes. Machining is required, necessitating piece-by-piece manufacture and the generation of scrap increasing the cost of the composite.
Another surface mount package having a ceramic frame with a plurality of apertures with a copper-tungsten composite extending across each aperture is disclosed in U.S. Pat. Nos. 5,111,277 and 5,188,985, both to Medeiros, III et al. Both U.S. Pat. No. 5,111,277 and U.S. Pat. No. 5,188,985 are incorporated by reference, as if each was disclosed herein, in its entirety.
Known packages can have limitations at very low temperatures, e.g., in the cryogenic range, as found for applications in deep space. When exposed to very low temperatures, surface mount packages soldered to a printed circuit board can crack and lose hermeticity.